GICR_PIDR5 (APU_GIC_REDIST_CTLLPI) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

GICR_PIDR5 (APU_GIC_REDIST_CTLLPI) Register Description

Register NameGICR_PIDR5
Relative Address0x000000FFD4
Absolute Address 0x00F908FFD4 (APU_GIC_REDIST_CTLLPI_0)
0x00F90AFFD4 (APU_GIC_REDIST_CTLLPI_1)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionPeripheral ID5 Register

GICR_PIDR5 (APU_GIC_REDIST_CTLLPI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:0roRead-only0x0Peripheral ID5 Register