GITS_TRKICR (APU_GIC_ITS_CTL) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

GITS_TRKICR (APU_GIC_ITS_CTL) Register Description

Register NameGITS_TRKICR
Relative Address0x000000C018
Absolute Address 0x00F902C018 (APU_GIC_ITS_CTL)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionGIC-500 ITE Cache Statistics Register

GITS_TRKICR (APU_GIC_ITS_CTL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
GITS_TRKICR_31_1631:16rwNormal read/write0GIC-500 ITE Cache Statistics Register
GITS_TRKICR_15_015:0rwNormal read/write0GIC-500 ITE Cache Statistics Register