IR_ENABLE (CPM4_ADDRREMAP) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID: AM012
Release Date: 2023-08-29
Revision: 1.3

IR_ENABLE (CPM4_ADDRREMAP) Register Description

Register Name	IR_ENABLE
Relative Address	0x0000000008
Absolute Address	0x00FCF30008 (CPM4_ADDRREMAP)
Width	32
Type	mixedMixed types. See bit-field details.
Reset Value	0x00000000
Description	Interrupt Enable Register. A write of to this location will unmask the interrupt. (IMR: 0)

IR_ENABLE (CPM4_ADDRREMAP) Register Bit-Field Summary

Field Name	Bits	Type	Reset Value	Description
Reserved	31:7	roRead-only	0x0	Reserved
araddr_mismatch2	6	woWrite-only	0x0	Read address mismatch on Port 2
araddr_mismatch1	5	woWrite-only	0x0	Read address mismatch on Port 1
araddr_mismatch0	4	woWrite-only	0x0	Read address mismatch on Port 0
awaddr_mismatch2	3	woWrite-only	0x0	Write address mismatch on Port 2
awaddr_mismatch1	2	woWrite-only	0x0	Write address mismatch on Port 1
awaddr_mismatch0	1	woWrite-only	0x0	Write address mismatch on Port 0
addr_decode_err	0	woWrite-only	0x0	Address decode error in this register block