IR_STATUS (CPM4_ADDRREMAP) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

IR_STATUS (CPM4_ADDRREMAP) Register Description

Register NameIR_STATUS
Relative Address0x0000000000
Absolute Address 0x00FCF30000 (CPM4_ADDRREMAP)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionInterrupt Status Register for intrN. This is a sticky register that holds the value of the interrupt until cleared by a value of 1.

IR_STATUS (CPM4_ADDRREMAP) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:7roRead-only0x0Reserved
araddr_mismatch2 6wtcReadable, write a 1 to clear0x0Read address mismatch on Port 2
araddr_mismatch1 5wtcReadable, write a 1 to clear0x0Read address mismatch on Port 1
araddr_mismatch0 4wtcReadable, write a 1 to clear0x0Read address mismatch on Port 0
awaddr_mismatch2 3wtcReadable, write a 1 to clear0x0Write address mismatch on Port 2
awaddr_mismatch1 2wtcReadable, write a 1 to clear0x0Write address mismatch on Port 1
awaddr_mismatch0 1wtcReadable, write a 1 to clear0x0Write address mismatch on Port 0
addr_decode_err 0wtcReadable, write a 1 to clear0x0Address decode error in this register block