ISR (CPM4_DMA_ATTR) Register Description
| Register Name | ISR |
|---|
| Relative Address | 0x0000000010 |
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| Absolute Address |
0x00FCA70010 (CPM4_DMA_ATTR)
|
|---|
| Width | 32 |
|---|
| Type | wtcReadable, write a 1 to clear |
|---|
| Reset Value | 0x00000000 |
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| Description | APB Interrupt Status |
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Interrupt Status Bits. READ: 0: no event detected 1: event detected WRITE: 0: no effect 1: clear status bit Note: These are sticky bits and are cleared by writing a one to the bit (WTC). Note: The system interrupt from the APB module is asserted when the status bit = 1 and the mask bit = 0.
ISR (CPM4_DMA_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| addr_decode_err | 0 | wtcReadable, write a 1 to clear | 0x0 | Address Decode Error |