Mask_50 (CPM4_DMA_ATTR) Register Description
| Register Name | Mask_50 |
|---|---|
| Relative Address | 0x0000000038 |
| Absolute Address | 0x00FCA70038 (CPM4_DMA_ATTR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Address masking for different datapath widths. Note: This register must be set to match the data width defined by the Data_Width register: For 64 bit, set = 6h07 For 128 bit, set = 6h0F For 256 bit, set = 6h1F For 512 bit, set = 6h3F |
This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_mask_50
Mask_50 (CPM4_DMA_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr | 5:0 | rwNormal read/write | 0x0 | Address masking for different datapath widths. Note: This register must be set to match the data width defined by the Data_Width register: For 64 bit, set = 6h07 For 128 bit, set = 6h0F For 256 bit, set = 6h1F For 512 bit, set = 6h3F |