Mode_Select (CANFD) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

Mode_Select (CANFD) Register Description

Register NameMode_Select
Relative Address0x0000000004
Absolute Address 0x00FF060004 (CANFD0)
0x00FF070004 (CANFD1)
Width16
TyperwNormal read/write
Reset Value0x00000000
DescriptionMode Select

Writing to the Mode Select Register enables the core to enter Snoop, Sleep, Loopback, or Normal modes. In Normal mode, the core participates in normal bus communication. If the SLEEP bit is set to 1, the core enters Sleep mode. If the LBACK bit is set to 1, the core enters Loopback mode. If the SNOOP mode is set to 1, the core enters Snoop mode and does not participate in bus communication but only receives messages. Note: [LBACK], [SLEEP], and [SNOOP] bits should never all be set to 1 at the same time. At any given point, the controller can either be in Loopback, Sleep, or Snoop mode. When all three bits are set to 0, the controller can enter Normal mode; subject to other conditions. Software Driver name: XCANFD_MSR Alternate register name: Mode_Select_Register

Mode_Select (CANFD) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
ABR 7rwNormal read/write0x0Auto Bus-off Recovery Request
0: no request
1: auto bus-off recovery request
Note: If this bit is set, node does auto bus-off recovery irrespective of SBR bit setting in this register.
Note: This bit can be written only when the SW_Reset [CEN] bit is 0.
SBR 6rwNormal read/write0x0Start Bus-off Recovery Request
1 = start bus-off recovery request
0 = no such request
Node stays in bus-off state until SBR bit is set to 1 (provided ABR bit in this register is not set).
This bit can be written only when node is in bus-off state.
This bit auto clears after node completes the bus-off recovery or leave bus-off state due to hard/soft reset or CEN deassertion.
DPEE 5rwNormal read/write0x0Disable Protocol Exception. Event Detection/Generation
0: PEE detection/generation is enabled. If CAN FD receiver detects 'res' bit as 1, it goes to bus integration state (PEE_config) and waits for Bus Idle.
1: disable Protocol Exception Event detection/generation by CAN FD receiver if 'res' bit in CAN FD frame is detected as 1. In this case, CAN FD receiver generates Form error condition (11 consecutive nominal recessive bits). Error counter remains unchanged.
Note: This bit can be written only when SW_Reset [CEN] bit is 0.
DAR 4rwNormal read/write0x0Disable Auto retransmission
0: auto retransmission enabled
1: disable auto retransmission on CAN bus to provide single shot transmission
This bit can be written only when SW_Reset [CEN] bit is 0.
BRSD 3rwNormal read/write0x0CAN FD Bit Rate Switch Disable Override
0: makes core transmit CAN FD frames as per [BRS] bit in TX Message element.
1 = makes core transmit CAN FD frames only in nominal bit rate (by overriding TX Message element [BRS] bit setting)
Note: This bit can be written only when SW_Reset [CEN] bit is 0.
SNOOP 2rwNormal read/write0x0SNOOP Mode Select/Request. The Snoop mode request bit.
0: no such request
1: request core to be in Snoop mode
Note: This bit can be written only when SW_Reset [CEN] bit is 0.
Note: Make sure that Snoop mode is programmed only after system reset or software reset.
Note: For the core to enter Snoop mode, [LBACK] and [SLEEP] bits in this register should be set to 0.
The features of Snoop mode are:
* Core transmits recessive bits on to CAN bus
* Receives messages that are transmitted by other nodes but does not ACK. Stores received messages in RX block RAM based on programmed ID filtering.
* Error counters are disabled and cleared to 0. Reads to error counter register returns zero.
LBACK 1rwNormal read/write0x0Loopback Mode Select/Request:
0: no request
1: request controller to be in Loopback mode
Note: This bit can be written only when SW_Reset [CEN] bit is = 0.
Note: For the controller to enter Loopback mode, the [SLEEP] and [SNOOP] bits should be set to 0.
SLEEP 0rwNormal read/write0x0Sleep Mode Select/Request. The Sleep mode request bit.
0: no request
1: request core to be in Sleep mode
Note: This bit is cleared when the core wakes up from the Sleep mode. For core to enter Sleep mode, the [LBACK] and [SNOOP] bits in this register should be set to 0.