PCIeBar2AXIBar_0_Len_PF3_VF (CPM4_DMA_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

PCIeBar2AXIBar_0_Len_PF3_VF (CPM4_DMA_ATTR) Register Description

Register NamePCIeBar2AXIBar_0_Len_PF3_VF
Relative Address0x00000007E0
Absolute Address 0x00FCA707E0 (CPM4_DMA_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionBar size in bits for PF3 VF BAR0

This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_pciebar2axibar_0_len_pf3_vf

PCIeBar2AXIBar_0_Len_PF3_VF (CPM4_DMA_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 6:0rwNormal read/write0x0Bar size in bits for PF3 VF BAR0