PCIeBar2AXIBar_3_Rd_Sec_PF1_VF (CPM4_DMA_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

PCIeBar2AXIBar_3_Rd_Sec_PF1_VF (CPM4_DMA_ATTR) Register Description

Register NamePCIeBar2AXIBar_3_Rd_Sec_PF1_VF
Relative Address0x00000005F4
Absolute Address 0x00FCA705F4 (CPM4_DMA_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionARPROT value for PF1 VF BAR3 reads

This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_pciebar2axibar_3_rd_sec_pf1_vf

PCIeBar2AXIBar_3_Rd_Sec_PF1_VF (CPM4_DMA_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 0rwNormal read/write0x0ARPROT value for PF1 VF BAR3 reads