PCIeBar2AXIBar_5_Wr_Sec_PF3_VF (CPM4_DMA_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

PCIeBar2AXIBar_5_Wr_Sec_PF3_VF (CPM4_DMA_ATTR) Register Description

Register NamePCIeBar2AXIBar_5_Wr_Sec_PF3_VF
Relative Address0x00000007BC
Absolute Address 0x00FCA707BC (CPM4_DMA_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionARPROT value for PF3 VF BAR5 writes

This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_pciebar2axibar_5_wr_sec_pf3_vf

PCIeBar2AXIBar_5_Wr_Sec_PF3_VF (CPM4_DMA_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 0rwNormal read/write0x0ARPROT value for PF3 VF BAR5 writes