PCIeBar_Num (CPM4_DMA_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

PCIeBar_Num (CPM4_DMA_ATTR) Register Description

Register NamePCIeBar_Num
Relative Address0x0000000100
Absolute Address 0x00FCA70100 (CPM4_DMA_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionNumber of pcie bars enabled

This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_pciebar_num

PCIeBar_Num (CPM4_DMA_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 2:0rwNormal read/write0x0Number of pcie bars enabled