PF1_Rd_Sec (CPM4_DMA_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

PF1_Rd_Sec (CPM4_DMA_ATTR) Register Description

Register NamePF1_Rd_Sec
Relative Address0x0000000800
Absolute Address 0x00FCA70800 (CPM4_DMA_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
Descriptionmultiq AXIMM ARPROT setting

This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_pf1_rd_sec

PF1_Rd_Sec (CPM4_DMA_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 0rwNormal read/write0x0multiq AXIMM ARPROT setting