PF2_1stvf_Offset (CPM4_DMA_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

PF2_1stvf_Offset (CPM4_DMA_ATTR) Register Description

Register NamePF2_1stvf_Offset
Relative Address0x0000000894
Absolute Address 0x00FCA70894 (CPM4_DMA_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
Descriptionthe function offset to the 1st VF within the PF

This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_pf2_1stvf_offset

PF2_1stvf_Offset (CPM4_DMA_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 7:0rwNormal read/write0x0the function offset to the 1st VF within the PF