PF2_Wr_Cache (CPM4_DMA_ATTR) Register Description
| Register Name | PF2_Wr_Cache |
|---|
| Relative Address | 0x0000000854 |
|---|
| Absolute Address |
0x00FCA70854 (CPM4_DMA_ATTR)
|
|---|
| Width | 32 |
|---|
| Type | rwNormal read/write |
|---|
| Reset Value | 0x00000000 |
|---|
| Description | multiq AIXMM_AWCACHE setting |
|---|
This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_pf2_wr_cache
PF2_Wr_Cache (CPM4_DMA_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| attr | 3:0 | rwNormal read/write | 0x0 | multiq AIXMM_AWCACHE setting |