PF_VF_BarLite_Int (CPM4_DMA_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

PF_VF_BarLite_Int (CPM4_DMA_ATTR) Register Description

Register NamePF_VF_BarLite_Int
Relative Address0x0000000094
Absolute Address 0x00FCA70094 (CPM4_DMA_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionMaps PF VF/barhit to DMA register space
[23:18] = 1 bit per PF3 VF BAR indicating which BARs map to dma/bridge register space.
[17:12] =
1 bit per PF2 VF BAR indicating which BARs map to dma/bridge register space.
[11:6] =
1 bit per PF1 VF BAR indicating which BARs map to dma/bridge register space.
[5:0] =
1 bit per PF0 VF BAR indicating which BARs map to dma/bridge register space.

This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_pf_vf_barlite_int

PF_VF_BarLite_Int (CPM4_DMA_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr23:0rwNormal read/write0x0Maps PF VF/barhit to DMA register space
[23:18] = 1 bit per PF3 VF BAR indicating which BARs map to dma/bridge register space.
[17:12] =
1 bit per PF2 VF BAR indicating which BARs map to dma/bridge register space.
[11:6] =
1 bit per PF1 VF BAR indicating which BARs map to dma/bridge register space.
[5:0] =
1 bit per PF0 VF BAR indicating which BARs map to dma/bridge register space.