RVBARADDR1H (APU_DUAL_CSR) Register Description
| Register Name | RVBARADDR1H |
|---|---|
| Relative Address | 0x000000004C |
| Absolute Address | 0x00FD5C004C (APU_DUAL_CSR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Reset Vector Base Address |
RVBARADDR1H (APU_DUAL_CSR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| ADDR | 11:0 | rwNormal read/write | 0x0 | Drives the A72MP RVBARADDR1[43:32] signals that determine the Reset Vector Base Address for executing in AArch64 state. For details, refer to ARM Cortex-A72 MPCore Processor Technical Reference Manual. This register is for CPU core 1. |