RxBuff1_DW00_Msg_n (CANFD) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

RxBuff1_DW00_Msg_n (CANFD) Register Description

Register NameRxBuff1_DW00_Msg_n
Relative Address0x0000004108
Absolute Address 0x00FF064108 (CANFD0)
0x00FF074108 (CANFD1)
Width32
TyperoRead-only
Reset Value0x00000000
Description64 dw_0 regs for RxBuffer_1 msgs 0 to 63 at 0x4108, 0x4150, etc (0x48 step)

The Rx FIFO 0 holds 64 messages. The DW 0 for message 0 is at offset 0x4108. Message 1 is at 0x4150. The address increment between messages is 0x048. For CAN and CANFD frames, DW 0 includes data bytes 0, 1, 2, 3 received based on the DLC control field. Software Driver name: RF1_RB_DW00 Original Bit Field Engineering Name: DLC

RxBuff1_DW00_Msg_n (CANFD) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
DB031:24roRead-only0Data Byte 0
Software Driver name: DB0
Note: Field name reference: Data_bytes0
DB123:16roRead-only0Data Byte 1
Software Driver name: DB1
Note: Field name reference: Data_bytes1
DB215:8roRead-only0Data Byte 2
Software Driver name: DB2
Note: Field name reference: Data_bytes2
DB3 7:0roRead-only0Data Byte 3
Software Driver name: DB3
Note: Field name reference: Data_bytes3