RxBuff_Status (CANFD) Register Description
| Register Name | RxBuff_Status |
|---|---|
| Relative Address | 0x00000000E8 |
| Absolute Address |
0x00FF0600E8 (CANFD0) 0x00FF0700E8 (CANFD1) |
| Width | 31 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Rx Buffer Status |
Software Driver name: FSR Alternate register name: RX_FIFO_Status_Register
RxBuff_Status (CANFD) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| B1_FL | 30:24 | roRead-only | 0x0 | RX buffer 1 Fill Level. Range is 0 to 64d. Number of stored Message in RX buffer 0 starting from [B1_RI] index given in this Register. For example, if [B1_FL] = 0x5 and [B1_RI] = 0x2 then the RX buffer 1 has five Messages starting from Read Index 2 (start at offset address 0x4190). Note: [B1_FL] is maintained if [CEN] bit is cleared. Note: [B1_FL] gets reset to 0 if any reset is asserted. Note: Field name reference: FL_1 |
| B1_IRI | 23 | woWrite-only | 0x0 | RX buffer 1 increment read index by 1. Write-only, reads back as 0. 0: no effect. 1: Read Index [B1_RI] is incremented by 1 and Fill Level [B1_FL] is decremented by 1. Note: If [B1_FL] level = 0, then writing to this bit has no effect. Note: The [B1_FL] might remain unchanged when [B1_IRI] is written if the controller is finishing a successful receive and is incrementing the internal write index. Note: Field name reference: IRI_1 |
| B1_RI | 21:16 | roRead-only | 0x0 | RX buffer 1 Read Index. Range is 0 to 63d. Read-only, writes are ignored. Each time the [B1_IRI] bit is set, the read index [B1_RI] is incremened by + 1 (provided [B1_FILL] level is not 0) and maintains it for software to access next available Message. Next Message read starting location: 0: 0x4100 1: 0x4148 2: 0x4196 etc Note: [B1_RI] value is maintained if [CEN] bit is cleared. Note: [B1_RI] value is reset to 0 when any reset is asserted. Note: Field name reference: RI_1 |
| B0_FL | 14:8 | roRead-only | 0x0 | RX buffer 0 Fill Level. Range is 0 to 64d. Number of stored Message in RX buffer 0 starting from [B0_RI] index given in this Register. For example, if [B0_FL] = 0x5 and [B0_RI] = 0x2 then the RX buffer 0 has five Messages starting from Read Index 2 (start at offset address 0x2190). Note: [B0_FL] is maintained if [CEN] bit is cleared. Note: [B0_FL] gets reset to 0 if any reset is asserted. Note: Field name reference: FL |
| B0_IRI | 7 | woWrite-only | 0x0 | RX buffer 0 increment read index by 1. Write-only, reads back as 0. 0: no effect. 1: Read Index [B0_RI] is incremented by 1 and Fill Level [B0_FL] is decremented by 1. Note: If [B0_FL] level = 0, then writing to this bit has no effect. Note: The [B0_FL] might remain unchanged when [B0_IRI] is written if the controller is finishing a successful receive and is incrementing the internal write index. Note: Field name reference: IRI |
| B0_RI | 5:0 | roRead-only | 0x0 | RX buffer 0 Read Index. Range is 0 to 63d. Read-only, writes are ignored. Each time the [B0_IRI] bit is set, the read index [B0_RI] is incremened by + 1 (provided [B0_FILL] level is not 0) and maintains it for software to access next available Message. Next Message read starting location: 0: 0x2100 1: 0x2148 2: 0x2196 etc Note: [B0_RI] value is maintained if [CEN] bit is cleared. Note: [B0_RI] value is reset to 0 when any reset is asserted. Note: Field name reference: RI |