Spare_0_L (CPM4_DMA_ATTR) Register Description
Register Name | Spare_0_L |
---|---|
Relative Address | 0x0000000070 |
Absolute Address | 0x00FCA70070 (CPM4_DMA_ATTR) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Bits,Field,Recommended setting,Description [31:29],xdma_c2h_axi_wr_cache[2:0],3h0,XDMA only. Specifies the awcache[2:0] for C2H0 writebacks to AXI MM. Awcache[3] is defined in the attr_dma_0_h attribute register. [28:25],xdma_c2h_axi_wr_sec[3:0],4h0,XDMA only. Specifies the awprot for C2H[3:0] writebacks to AXI MM [24:21],xdma_h2c_axi_rd_cache[3:0],4h0,XDMA only. Specifies the arcache[3:0] for H2C3 writebacks to AXI MM. [20:17],xdma_h2c_axi_rd_cache[3:0],4h0,XDMA only. Specifies the arcache[3:0] for H2C2 writebacks to AXI MM. [16:13],xdma_h2c_axi_rd_cache[3:0],4h0,XDMA only. Specifies the arcache[3:0] for H2C1 writebacks to AXI MM. [12:9],xdma_h2c_axi_rd_cache[3:0],4h0,XDMA only. Specifies the arcache[3:0] for H2C0 writebacks to AXI MM. [8:5],xdma_h2c_axi_rd_sec[3:0],4h0,XDMA only. Specifies the arprot for H2C[3:0] writebacks to AXI MM. [4:0],Reserved,5h0,Reserved |
This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_spare_0_l
Spare_0_L (CPM4_DMA_ATTR) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
attr | 31:0 | rwNormal read/write | 0x0 | Bits,Field,Recommended setting,Description [31:29],xdma_c2h_axi_wr_cache[2:0],3h0,XDMA only. Specifies the awcache[2:0] for C2H0 writebacks to AXI MM. Awcache[3] is defined in the attr_dma_0_h attribute register. [28:25],xdma_c2h_axi_wr_sec[3:0],4h0,XDMA only. Specifies the awprot for C2H[3:0] writebacks to AXI MM [24:21],xdma_h2c_axi_rd_cache[3:0],4h0,XDMA only. Specifies the arcache[3:0] for H2C3 writebacks to AXI MM. [20:17],xdma_h2c_axi_rd_cache[3:0],4h0,XDMA only. Specifies the arcache[3:0] for H2C2 writebacks to AXI MM. [16:13],xdma_h2c_axi_rd_cache[3:0],4h0,XDMA only. Specifies the arcache[3:0] for H2C1 writebacks to AXI MM. [12:9],xdma_h2c_axi_rd_cache[3:0],4h0,XDMA only. Specifies the arcache[3:0] for H2C0 writebacks to AXI MM. [8:5],xdma_h2c_axi_rd_sec[3:0],4h0,XDMA only. Specifies the arprot for H2C[3:0] writebacks to AXI MM. [4:0],Reserved,5h0,Reserved |