TxBuff_DW00_Msg_n (CANFD) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

TxBuff_DW00_Msg_n (CANFD) Register Description

Register NameTxBuff_DW00_Msg_n
Relative Address0x0000000108
Absolute Address 0x00FF060108 (CANFD0)
0x00FF070108 (CANFD1)
Width32
TyperwNormal read/write
Reset Value0x00000000
Description32 TxBuffer dw_0 regs for msgs 0 to 31 at 0x0108, 0x0150, etc (0x48 step)

There are Tx message buffers. Each message is written in 16 data word (DW) registers for a total of 64 bytes. The message 0 data words are grouped together starting at 0x0108. Message 1 data words start at 0x0150. The address increment between data sets is 0x048. Software Driver name: TB_DW00 Original Bit Field Engineering Name: DLC

TxBuff_DW00_Msg_n (CANFD) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
DB031:24rwNormal read/write0Data Byte 0
Software Driver name: DB0
Note: Field name reference: Data_bytes0
DB123:16rwNormal read/write0Data Byte 1
Software Driver name: DB1
Note: Field name reference: Data_bytes1
DB215:8rwNormal read/write0Data Byte 2
Software Driver name: DB2
Note: Field name reference: Data_bytes2
DB3 7:0rwNormal read/write0Data Byte 3
Software Driver name: DB3
Note: Field name reference: Data_bytes3