aximm_dma_steering_mode (CPM4_DMA_ATTR) Register Description
| Register Name | aximm_dma_steering_mode |
|---|---|
| Relative Address | 0x00000000C8 |
| Absolute Address | 0x00FCA700C8 (CPM4_DMA_ATTR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Steering mode to determine which MM Master Port DMA transactions will use. 0: mapped - channels will use attribute configured MM port 1: toggle - Requests will alternate between ports. This mechanism does not distinguish between channels. |
This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_aximm_dma_steering_mode
aximm_dma_steering_mode (CPM4_DMA_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr | 0 | rwNormal read/write | 0x0 | Steering mode to determine which MM Master Port DMA transactions will use. 0: mapped - channels will use attribute configured MM port 1: toggle - Requests will alternate between ports. This mechanism does not distinguish between channels. |