aximm_dsc_Port (CPM4_DMA_ATTR) Register Description
Register Name | aximm_dsc_Port |
---|---|
Relative Address | 0x00000000CC |
Absolute Address | 0x00FCA700CC (CPM4_DMA_ATTR) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Steering mode to determine which MM Master Port Descriptor Fetch transactions will use. 0: descriptor requests will be issued on MM0 1: descriptor requests will be issued on MM1 |
This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_aximm_dsc_port
aximm_dsc_Port (CPM4_DMA_ATTR) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
attr | 0 | rwNormal read/write | 0x0 | Steering mode to determine which MM Master Port Descriptor Fetch transactions will use. 0: descriptor requests will be issued on MM0 1: descriptor requests will be issued on MM1 |