ccix_per_control (CPM4_DVSEC1) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

ccix_per_control (CPM4_DVSEC1) Register Description

Register Nameccix_per_control
Relative Address0x0000000DC8
Absolute Address 0x00FCFC0DC8 (CPM4_DVSEC1)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionCCIX PER Message Capability (Physical Function #0 only)

ccix_per_control (CPM4_DVSEC1) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attrib31:0rwNormal read/write0x0Control Register