ccix_per_pkt_hdr_1 (CPM4_DVSEC0) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

ccix_per_pkt_hdr_1 (CPM4_DVSEC0) Register Description

Register Nameccix_per_pkt_hdr_1
Relative Address0x0000000DD0
Absolute Address 0x00FCFB0DD0 (CPM4_DVSEC0)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionCCIX PER Message Capability (Physical Function #0 only)

ccix_per_pkt_hdr_1 (CPM4_DVSEC0) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
byte431:24rwNormal read/write0x0Packet Header Byte 4
byte523:16rwNormal read/write0x0Packet Header Byte 5
byte615:8rwNormal read/write0x0Packet Header Byte 6
byte7 7:0rwNormal read/write0x0Packet Header Byte 7