ccix_per_pkt_hdr_2 (CPM4_DVSEC0) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

ccix_per_pkt_hdr_2 (CPM4_DVSEC0) Register Description

Register Nameccix_per_pkt_hdr_2
Relative Address0x0000000DD4
Absolute Address 0x00FCFB0DD4 (CPM4_DVSEC0)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionCCIX PER Message Capability (Physical Function #0 only)

ccix_per_pkt_hdr_2 (CPM4_DVSEC0) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
byte831:24rwNormal read/write0x0Packet Header Byte 8
byte923:16rwNormal read/write0x0Packet Header Byte 9
byte1015:8rwNormal read/write0x0Packet Header Byte 10
byte11 7:0rwNormal read/write0x0Packet Header Byte 11