ccix_per_status (CPM4_DVSEC0) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

ccix_per_status (CPM4_DVSEC0) Register Description

Register Nameccix_per_status
Relative Address0x0000000DC4
Absolute Address 0x00FCFB0DC4 (CPM4_DVSEC0)
Width32
TypewtcReadable, write a 1 to clear
Reset Value0x00000000
DescriptionCCIX PER Message Capability (Physical Function #0 only)

ccix_per_status (CPM4_DVSEC0) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attrib31:0wtcReadable, write a 1 to clear0x0Status Register