cml_port_aggr_grp0_add_mask_u_cxrh_nid72 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

cml_port_aggr_grp0_add_mask_u_cxrh_nid72 (CPM4_CMN600) Register Description

Register Namecml_port_aggr_grp0_add_mask_u_cxrh_nid72
Relative Address0x0000950E08
Absolute Address 0x00FC950E08 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00000040
DescriptionConfigures the CCIX port aggregation address mask for group 0.

cml_port_aggr_grp0_add_mask_u_cxrh_nid72 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:48razRead as zero0x0reserved
addr_mask47:6rwNormal read/write0x1Address mask to be applied before hashing
Reserved 5:0razRead as zero0x0reserved