por_cfgm_child_pointer_5_u_hnd_nid8 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_cfgm_child_pointer_5_u_hnd_nid8 (CPM4_CMN600) Register Description

Register Namepor_cfgm_child_pointer_5_u_hnd_nid8
Relative Address0x0000100128
Absolute Address 0x00FC100128 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00008000
DescriptionContains base address of child configuration node. NOTE: There will be as many child pointer registers in the Global Config Unit as the number of XPs on the chip. Each successive child pointer register will be at the next 8 byte address boundary. Each successive child pointer register will be named with the suffix corresponding to the register number. For example por_cfgm_child_pointer_<number>

por_cfgm_child_pointer_5_u_hnd_nid8 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:32razRead as zero0x0reserved
relative_address31:0roRead-only0x8000Bit 31: External or internal child node 1b1: Indicates child pointer points to a configuration node that is external to CMN-600 1b0: Indicates child pointer points to a configuration node that is internal to CMN-600 Bits [30:28]: Set to 3b000 Bits [27:0]: Child node address offset relative to PERIPHBASE