por_cxg_ha_errmisc_u_cxrh_nid72 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_cxg_ha_errmisc_u_cxrh_nid72 (CPM4_CMN600) Register Description

Register Namepor_cxg_ha_errmisc_u_cxrh_nid72
Relative Address0x0000913020
Absolute Address 0x00FC913020 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionFunctions as the miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.

por_cxg_ha_errmisc_u_cxrh_nid72 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:56razRead as zero0x0reserved
ERRSET55:48rwNormal read/write0x0RAM entry set address for parity error
Reserved47:10razRead as zero0x0reserved
SRCID 9:4rwNormal read/write0x0CCIX RAID of the requestor or the snoop target
Reserved 3:2razRead as zero0x0reserved
ERRSRC 1:0rwNormal read/write0x0Source of the parity error 2b00: Read data buffer 0 2b01: Read data buffer 1 2b10: Write data buffer 0 2b11: Write data buffer 1