por_cxg_ha_errstatus_NS_u_cxrh_nid68 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_cxg_ha_errstatus_NS_u_cxrh_nid68 (CPM4_CMN600) Register Description

Register Namepor_cxg_ha_errstatus_NS_u_cxrh_nid68
Relative Address0x0000817110
Absolute Address 0x00FC817110 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionFunctions as the non-secure error status register. AV and MV bits must be cleared in the same cycle, otherwise the error record does not have a consistent view.

por_cxg_ha_errstatus_NS_u_cxrh_nid68 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:32razRead as zero0x0reserved
AV31wtcReadable, write a 1 to clear0x0Address register valid; writes to this bit are ignored if any of the UE, DE, or CE bits are set to 1, and the highest priority are not cleared to 0 in the same write; write a 1 to clear 1b1: Address is valid; por_cxg_ha_erraddr contains a physical address for that recorded error 1b0: Address is not valid
V30wtcReadable, write a 1 to clear0x0Register valid; writes to this bit are ignored if any of the UE, DE, or CE bits are set to 1, and are not cleared to 0 in the same write; write a 1 to clear 1b1: At least one error recorded; register is valid 1b0: No errors recorded
UE29wtcReadable, write a 1 to clear0x0Uncorrected errors; writes to this bit are ignored if the OF bit is set to 1, and is not cleared to 0 in the same write; write a 1 to clear 1b1: At least one error detected that is not corrected and is not deferred to a slave 1b0: No uncorrected errors detected
Reserved28razRead as zero0x0reserved
OF27wtcReadable, write a 1 to clear0x0Overflow; asserted when multiple errors of the highest priority type are detected; write a 1 to clear 1b1: More than one error detected 1b0: Only one error of the highest priority type detected as described by UE/DE/CE fields
MV26wtcReadable, write a 1 to clear0x0por_cxg_ha_errmisc valid; writes to this bit are ignored if any of the UE, DE, or CE bits are set to 1, and the highest priority are not cleared to 0 in the same write; write a 1 to clear 1b1: Miscellaneous registers are valid 1b0: Miscellaneous registers are not valid
Reserved25razRead as zero0x0reserved
CE24wtcReadable, write a 1 to clear0x0Corrected errors; writes to this bit are ignored if the OF bit is set to 1, and is not cleared to 0 in the same write; write a 1 to clear 1b1: At least one transient corrected error recorded 1b0: No corrected errors recorded
DE23wtcReadable, write a 1 to clear0x0Deferred errors; writes to this bit are ignored if the OF bit is set to 1, and is not cleared to 0 in the same write; write a 1 to clear 1b1: At least one error is not corrected and is deferred 1b0: No errors deferred
Reserved22:0razRead as zero0x0reserved