por_cxg_ra_aux_ctl_u_cxrh_nid68 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_cxg_ra_aux_ctl_u_cxrh_nid68 (CPM4_CMN600) Register Description

Register Namepor_cxg_ra_aux_ctl_u_cxrh_nid68
Relative Address0x0000804A08
Absolute Address 0x00FC804A08 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00000006
DescriptionFunctions as the auxiliary control register for CXRA.

por_cxg_ra_aux_ctl_u_cxrh_nid68 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:10razRead as zero0x0reserved
dis_dbiddispq_rsp 9rwNormal read/write0x0When set, disables the dispatch of DBID responses from a separate DispatchQ.
dis_wrreqchain 8rwNormal read/write0x0When set, disables chaining of write requests.
dis_rdreqchain 7rwNormal read/write0x0When set, disables chaining of read and dataless requests.
r2byp_en 6rwNormal read/write0x0When set, enables request bypass. Applies to read and dataless requests only. Note: When set will affect the capability to chain a request on the TX side
dis_rem_secure_access 5rwNormal read/write0x0When set, treats all the incoming snoops as non-secure and forces the NS bit to 1
sameaddr_ord_wfc 4rwNormal read/write0x0When set, enables waiting for completion (COMP) before dispatching next same Addr dependent transaction (TXN)
devnr_ord_wfc 3rwNormal read/write0x0When set, enables waiting for completion (COMP) before dispatching next Device-nR dependent transaction (TXN)
early_compack_en 2rwNormal read/write0x1Early CompAck enable; enables sending early CompAck on CCIX for requests that require CompAck
early_rdrcpt_en 1rwNormal read/write0x1Early ReadReceipt enable; enables sending early ReadReceipt for ordered read requests
cg_disable 0rwNormal read/write0x0Disables clock gating when set