por_cxla_rx_cxs_attr_capabilities_u_cxrh_nid72 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID: AM012
Release Date: 2023-08-29
Revision: 1.3

por_cxla_rx_cxs_attr_capabilities_u_cxrh_nid72 (CPM4_CMN600) Register Description

Register Name	por_cxla_rx_cxs_attr_capabilities_u_cxrh_nid72
Relative Address	0x0000920C18
Absolute Address	0x00FC920C18 (CPM4_CMN)
Width	64
Type	mixedMixed types. See bit-field details.
Reset Value	0x00000020
Description	Contains RX CXS supported attributes.

por_cxla_rx_cxs_attr_capabilities_u_cxrh_nid72 (CPM4_CMN600) Register Bit-Field Summary

Field Name	Bits	Type	Reset Value	Description
Reserved	63:10	razRead as zero	0x0	reserved
rxcxscontrolreplication	9:8	roRead-only	0x0	RX CXS control replication supported 2b00: None 2b01: Duplicate 2b10: Triplicate
rxcxsdatacheck	7:6	roRead-only	0x0	RX CXS datacheck supported 2b00: None 2b01: Parity 2b10: SECDED
rxcxserrorfullpkt	5	roRead-only	0x1	RX CXS error full packet supported 1b0: False 1b1: True
rxcxscontinuousdata	4	roRead-only	0x0	RX CXS continuous data supported 1b0: False 1b1: True
rxcxsmaxpktperflit	3:2	roRead-only	0x0	RX CXS maximum packets per flit supported 2b00: 2 2b01: 3 2b10: 4
rxcxsdataflitwidth	1:0	roRead-only	0x0	RX CXS data flit width supported 2b00: 256b 2b01: 512b 2b10: 1024b