por_cxla_tlp_hdr_fields_u_cxrh_nid72 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_cxla_tlp_hdr_fields_u_cxrh_nid72 (CPM4_CMN600) Register Description

Register Namepor_cxla_tlp_hdr_fields_u_cxrh_nid72
Relative Address0x0000920C80
Absolute Address 0x00FC920C80 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x7F000072
DescriptionConfigures PCIe header field values.

por_cxla_tlp_hdr_fields_u_cxrh_nid72 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:48razRead as zero0x0reserved
vendorid47:32rwNormal read/write0x0Vendor ID
messagecode31:24rwNormal read/write0x7FMessage code
Reserved23:19razRead as zero0x0reserved
td18rwNormal read/write0x0TLP digest
ep17rwNormal read/write0x0Error forwarding
at16:15rwNormal read/write0x0Address type
tc14:12rwNormal read/write0x0Traffic class
attr11:8rwNormal read/write0x0Attributes
fmt 7:5rwNormal read/write0x3Format
pkt_type 4:0rwNormal read/write0x12Type