por_dn_aux_ctl_u_hnd_nid8 (CPM4_CMN600) Register Description
| Register Name | por_dn_aux_ctl_u_hnd_nid8 |
|---|---|
| Relative Address | 0x0000120A00 |
| Absolute Address | 0x00FC120A00 (CPM4_CMN) |
| Width | 64 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Functions as the auxiliary control register for DN. |
por_dn_aux_ctl_u_hnd_nid8 (CPM4_CMN600) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 63:3 | razRead as zero | 0x0 | reserved |
| enable_rnd_icache_ops | 2 | rwNormal read/write | 0x0 | Filters out BPI and VICI/PICI Snps to RNDs when set |
| disable_clk_gating | 1 | rwNormal read/write | 0x0 | Disables autonomous clock gating when set |
| disable_vmf | 0 | rwNormal read/write | 0x0 | This bit is currently not supported. Software must not program this bit. |