por_dn_vmf2_ctrl_u_hnd_nid8 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_dn_vmf2_ctrl_u_hnd_nid8 (CPM4_CMN600) Register Description

Register Namepor_dn_vmf2_ctrl_u_hnd_nid8
Relative Address0x0000120C40
Absolute Address 0x00FC120C40 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0xFFFF00000000
DescriptionFunctions as the control register for VMID-based DVM snoop filtering. NOTE: This register has no effect when por_dn_aux_ctl.disable_vmf is set to 1.

por_dn_vmf2_ctrl_u_hnd_nid8 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:48razRead as zero0x0reserved
mask47:32rwNormal read/write0xFFFFVMID mask; enables mapping of multiple VMID values to a single register NOTE: Logically, the AND operator is performed on the mask and por_dn_vmf2_ctrl.vmid. Then, the AND operator is performed on the mask and the incoming requests VMID. The two results are then compared, and filtering is applied to the incoming request if the masked VMIDs match.
Reserved31:17razRead as zero0x0reserved
vmid16:1rwNormal read/write0x0VMID value NOTE: The incoming requests VMID is only compared with this VMID value if the requests VMID valid bit is set. If the requests VMID is valid and the two VMIDs match, filtering is applied to the incoming request.
valid 0rwNormal read/write0x0Register valid 1b1: Register is enabled 1b0: Register is not enabled