por_dn_vmf2_ctrl_u_hnd_nid8 (CPM4_CMN600) Register Description
Register Name | por_dn_vmf2_ctrl_u_hnd_nid8 |
---|---|
Relative Address | 0x0000120C40 |
Absolute Address | 0x00FC120C40 (CPM4_CMN) |
Width | 64 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0xFFFF00000000 |
Description | Functions as the control register for VMID-based DVM snoop filtering. NOTE: This register has no effect when por_dn_aux_ctl.disable_vmf is set to 1. |
por_dn_vmf2_ctrl_u_hnd_nid8 (CPM4_CMN600) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 63:48 | razRead as zero | 0x0 | reserved |
mask | 47:32 | rwNormal read/write | 0xFFFF | VMID mask; enables mapping of multiple VMID values to a single register NOTE: Logically, the AND operator is performed on the mask and por_dn_vmf2_ctrl.vmid. Then, the AND operator is performed on the mask and the incoming requests VMID. The two results are then compared, and filtering is applied to the incoming request if the masked VMIDs match. |
Reserved | 31:17 | razRead as zero | 0x0 | reserved |
vmid | 16:1 | rwNormal read/write | 0x0 | VMID value NOTE: The incoming requests VMID is only compared with this VMID value if the requests VMID valid bit is set. If the requests VMID is valid and the two VMIDs match, filtering is applied to the incoming request. |
valid | 0 | rwNormal read/write | 0x0 | Register valid 1b1: Register is enabled 1b0: Register is not enabled |