por_dt_pmccntr_u_hnd_nid8 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_dt_pmccntr_u_hnd_nid8 (CPM4_CMN600) Register Description

Register Namepor_dt_pmccntr_u_hnd_nid8
Relative Address0x0000132040
Absolute Address 0x00FC132040 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionContains the PMU cycle counter.

por_dt_pmccntr_u_hnd_nid8 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:40razRead as zero0x0reserved
pmccntr39:0rwNormal read/write0x0PMU cycle counter