por_dt_pmevcntGH_u_hnd_nid8 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_dt_pmevcntGH_u_hnd_nid8 (CPM4_CMN600) Register Description

Register Namepor_dt_pmevcntGH_u_hnd_nid8
Relative Address0x0000132030
Absolute Address 0x00FC132030 (CPM4_CMN)
Width64
TyperwNormal read/write
Reset Value0x00000000
DescriptionContains the PMU event counters G and H.

por_dt_pmevcntGH_u_hnd_nid8 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
pmevcntH63:32rwNormal read/write0x0PMU counter H
pmevcntG31:0rwNormal read/write0x0PMU counter G