por_dt_pmovsr_clr_u_hnd_nid8 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_dt_pmovsr_clr_u_hnd_nid8 (CPM4_CMN600) Register Description

Register Namepor_dt_pmovsr_clr_u_hnd_nid8
Relative Address0x0000132120
Absolute Address 0x00FC132120 (CPM4_CMN)
Width64
TypewoWrite-only
Reset Value0x00000000
DescriptionClears the PMU overflow status.

por_dt_pmovsr_clr_u_hnd_nid8 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:9woWrite-only0x0reserved
pmovsr_clr 8:0woWrite-only0x0Write a 1 to clear the corresponding bit in por_dt_pmovsr.pmovsr