por_dt_pmovsr_u_hnd_nid8 (CPM4_CMN600) Register Description
| Register Name | por_dt_pmovsr_u_hnd_nid8 |
|---|---|
| Relative Address | 0x0000132118 |
| Absolute Address | 0x00FC132118 (CPM4_CMN) |
| Width | 64 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Provides the PMU overflow status. |
por_dt_pmovsr_u_hnd_nid8 (CPM4_CMN600) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 63:9 | razRead as zero | 0x0 | reserved |
| pmovsr | 8:0 | roRead-only | 0x0 | PMU overflow status Bit 8: Indicates overflow from cycle counter Bits [7:0]: Indicates overflow from counters 7 to 0 |