por_dt_pmssr_u_hnd_nid8 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_dt_pmssr_u_hnd_nid8 (CPM4_CMN600) Register Description

Register Namepor_dt_pmssr_u_hnd_nid8
Relative Address0x0000132128
Absolute Address 0x00FC132128 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionProvides the PMU snapshot status.

por_dt_pmssr_u_hnd_nid8 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:17razRead as zero0x0reserved
ss_pin_active16roRead-only0x0Activates PMU snapshot from PMUSNAPSHOTREQ
ss_cfg_active15roRead-only0x0PMU snapshot activated from configuration write
Reserved14:9razRead as zero0x0reserved
ss_status 8:0roRead-only0x0PMU snapshot status Bit 8: Indicates snapshot status for cycle counter Bits [7:0]: Indicates snapshot status for counters 7 to 0