por_dtm_fifo_entry0_1_u_smxp_1_0 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_dtm_fifo_entry0_1_u_smxp_1_0 (CPM4_CMN600) Register Description

Register Namepor_dtm_fifo_entry0_1_u_smxp_1_0
Relative Address0x000040A128
Absolute Address 0x00FC40A128 (CPM4_CMN)
Width64
TyperoRead-only
Reset Value0x00000000
DescriptionContains DTM FIFO entry 0 data.

por_dtm_fifo_entry0_1_u_smxp_1_0 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
fifo_data163:0roRead-only0x0Entry data bit vector 127:64