por_dtm_fifo_entry2_0_u_smxp_0_1 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_dtm_fifo_entry2_0_u_smxp_0_1 (CPM4_CMN600) Register Description

Register Namepor_dtm_fifo_entry2_0_u_smxp_0_1
Relative Address0x000010A150
Absolute Address 0x00FC10A150 (CPM4_CMN)
Width64
TyperoRead-only
Reset Value0x00000000
DescriptionContains DTM FIFO entry 2 data.

por_dtm_fifo_entry2_0_u_smxp_0_1 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
fifo_data063:0roRead-only0x0Entry data bit vector 63:0