por_dtm_pmsicr_u_smxp_1_1 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_dtm_pmsicr_u_smxp_1_1 (CPM4_CMN600) Register Description

Register Namepor_dtm_pmsicr_u_smxp_1_1
Relative Address0x000050A200
Absolute Address 0x00FC50A200 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionFunctions as the sampling interval counter register.

por_dtm_pmsicr_u_smxp_1_1 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:32razRead as zero0x0reserved
count31:0rwNormal read/write0x0Current value of sample counter