por_hnf_err_inj_u_hnf_nid36 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_hnf_err_inj_u_hnf_nid36 (CPM4_CMN600) Register Description

Register Namepor_hnf_err_inj_u_hnf_nid36
Relative Address0x0000407030
Absolute Address 0x00FC407030 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionEnables error injection and setup. When enabled for a given source ID and logic processor ID, HN-F returns a slave error and reports an error interrupt. This error interrupt emulates a SLC double-bit data ECC error. This feature enables software to test the error handler. The slave error is reported for cacheable read access for which SLC hit is the data source. No slave error or error interrupt is reported for cacheable read access in which SLC miss is the data source.

por_hnf_err_inj_u_hnf_nid36 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:27razRead as zero0x0reserved
hnf_err_inj_srcid26:16rwNormal read/write0x0RN source ID for read access which results in a SLC miss; does not report slave error or error to match error injection
Reserved15:9razRead as zero0x0reserved
hnf_err_inj_lpid 8:4rwNormal read/write0x0LPID used to match for error injection
Reserved 3:1razRead as zero0x0reserved
hnf_err_inj_en 0rwNormal read/write0x0Enables error injection and report