por_hnf_ppu_idr1_u_hnf_nid36 (CPM4_CMN600) Register Description
| Register Name | por_hnf_ppu_idr1_u_hnf_nid36 |
|---|---|
| Relative Address | 0x0000405FB4 |
| Absolute Address | 0x00FC405FB4 (CPM4_CMN) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Provides identification information for the HN-F PPU. |
por_hnf_ppu_idr1_u_hnf_nid36 (CPM4_CMN600) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:4 | razRead as zero | 0x0 | reserved |
| dyn_policy_min_irq_spt | 3 | roRead-only | 0x0 | Dynamic minimum policy interrupt support |
| off_lock_spt | 2 | roRead-only | 0x0 | Off and mem_ret lock support |
| sw_dev_del_config_spt | 1 | roRead-only | 0x0 | Software device delay control configuration support |
| pwr_mode_entry_del_spt | 0 | roRead-only | 0x0 | Power mode entry delay support |