por_hnf_sam_control_u_hnf_nid40 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)
Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_hnf_sam_control_u_hnf_nid40 (CPM4_CMN600) Register Description

Register Namepor_hnf_sam_control_u_hnf_nid40
Relative Address0x0000500D00
Absolute Address 0x00FC500D00 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionConfigures HN-F SAM. All top_address_bit fields must be between bits 47 and 28 of the address. top_address_bit2 > top_address_bit1 > top_address_bit0. Must be configured to match corresponding por_rnsam_sys_cache_grp_sn_sam_cfgN register in the RN SAM.

por_hnf_sam_control_u_hnf_nid40 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
hn_cfg_sam_inv_top_address_bit63rwNormal read/write0x0Inverts the top address bit (hn_cfg_sam_top_address_bit1 if 3-SN, hn_cfg_sam_top_address_bit2 if 6-SN) NOTE: Can only be used when the address map does not have unique address bit combinations.
Reserved62razRead as zero0x0reserved
hn_cfg_sam_top_address_bit261:56rwNormal read/write0x0Bit position of top_address_bit2; used for address hashing in 6-SN configuration
Reserved55:54razRead as zero0x0reserved
hn_cfg_sam_top_address_bit153:48rwNormal read/write0x0Bit position of top_address_bit1; used for address hashing in 3-SN/6-SN configuration
Reserved47:46razRead as zero0x0reserved
hn_cfg_sam_top_address_bit045:40rwNormal read/write0x0Bit position of top_address_bit0; used for address hashing in 3-SN/6-SN configuration
Reserved39:38razRead as zero0x0reserved
hn_cfg_six_sn_en37rwNormal read/write0x0Enables 6-SN configuration
hn_cfg_three_sn_en36rwNormal read/write0x0Enables 3-SN configuration
Reserved35razRead as zero0x0reserved
hn_cfg_sn2_nodeid34:24rwNormal read/write0x0SN 2 node ID
Reserved23razRead as zero0x0reserved
hn_cfg_sn1_nodeid22:12rwNormal read/write0x0SN 1 node ID
Reserved11razRead as zero0x0reserved
hn_cfg_sn0_nodeid10:0rwNormal read/write0x0SN 0 node ID