por_hnf_slc_lock_base0_u_hnf_nid36 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_hnf_slc_lock_base0_u_hnf_nid36 (CPM4_CMN600) Register Description

Register Namepor_hnf_slc_lock_base0_u_hnf_nid36
Relative Address0x0000404C08
Absolute Address 0x00FC404C08 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionFunctions as the base register for lock region 0 [47:0].

por_hnf_slc_lock_base0_u_hnf_nid36 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
base0_vld63rwNormal read/write0x0Lock region 0 base valid
Reserved62:48razRead as zero0x0reserved
base047:0rwNormal read/write0x0Lock region 0 base address