por_mxp_p0_qos_lat_tgt_u_smxp_1_1 (CPM4_CMN600) Register Description
Register Name | por_mxp_p0_qos_lat_tgt_u_smxp_1_1 |
---|---|
Relative Address | 0x0000508A88 |
Absolute Address | 0x00FC508A88 (CPM4_CMN) |
Width | 64 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | Controls QoS target latency/period (in cycles) for regulation of devices connected to port 0. |
por_mxp_p0_qos_lat_tgt_u_smxp_1_1 (CPM4_CMN600) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 63:12 | razRead as zero | 0x0 | reserved |
p0_lat_tgt | 11:0 | rwNormal read/write | 0x0 | Port 0 transaction target latency/period; a value of 0 corresponds to no regulation |