por_mxp_p0_syscoreq_ctl_u_smxp_0_1 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_mxp_p0_syscoreq_ctl_u_smxp_0_1 (CPM4_CMN600) Register Description

Register Namepor_mxp_p0_syscoreq_ctl_u_smxp_0_1
Relative Address0x0000109000
Absolute Address 0x00FC109000 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionFunctions as the port 0 snoop and DVM domain control register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p0_syscoack_status. NOTE: Only valid on RN-F ports.

por_mxp_p0_syscoreq_ctl_u_smxp_0_1 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:4razRead as zero0x0reserved
snpdvm_req_p0_d3 3roRead-only0x0When set, initiates the process of enabling snoop and DVM dispatches (SYSCOREQ) to device 3 on port 0
snpdvm_req_p0_d2 2roRead-only0x0When set, initiates the process of enabling snoop and DVM dispatches (SYSCOREQ) to device 2 on port 0
snpdvm_req_p0_d1 1roRead-only0x0When set, initiates the process of enabling snoop and DVM dispatches (SYSCOREQ) to device 1 on port 0
snpdvm_req_p0_d0 0roRead-only0x0When set, initiates the process of enabling snoop and DVM dispatches (SYSCOREQ) to device 0 on port 0