por_ppu_int_enable_u_hnd_nid8 (CPM4_CMN600) Register Description
| Register Name | por_ppu_int_enable_u_hnd_nid8 |
|---|---|
| Relative Address | 0x0000101000 |
| Absolute Address | 0x00FC101000 (CPM4_CMN) |
| Width | 64 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Configures the HN-F PPU event interrupt. Contains the interrupt mask. |
por_ppu_int_enable_u_hnd_nid8 (CPM4_CMN600) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| hnf_ppu_enable | 63:0 | rwNormal read/write | 0x0 | Interrupt mask |